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Before you look at the code any further, you need to understand what SPI is and how it works. SPI can be a complicated subject, so I am not going to go into it in any great depth. This is a beginner s book after all. Instead, I am going to give you just enough knowledge so that you understand what SPI is, how it works, and the parts that are relevant to the sketches in Projects 31 and 32 that use the SPI bus with the SCP1000 sensor. You will then be able to understand how to interface with other devices that also use SPI. SPI is a way for two devices to exchange information. It has the benefits of needing only four pins from the Arduino and it s is fast. SPI is a synchronous protocol that allows a master device to communicate with a slave device. The data is controlled with a clock signal (CLK) which decides when data can change and when it is valid for reading. The clock rate can vary, unlike some other protocols in which the clock signal must be timed very accurately. This makes it ideal for microcontrollers that do not run particularly fast or whose internal oscillator is not clocked precisely. SPI is a Master-Slave protocol (see Figure 11-3), meaning that a master device controls the clock signal. No data can be transmitted unless the clock is pulsed. SPI is also a data exchange protocol. This means that as data is clocked out, new data is being clocked in. Devices cannot simply transmit or receive data; they must exchange it, even if the data on one side is not being used in your program.

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JSF s request processing lifecycle describes how HTTP requests from a client are processed to generate a response by the server. JSF s request processing lifecycle is divided into several phases. Figure 20-3 illustrates this.

Tip You need to know the material in this section very well, because the available documentation on JSF and documentation for technologies based on JSF, like Shale, frequently refer to the various phases of JSF's request processing lifecycle.

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Figure 11-3. SPU bus: single master and single slave (image courtesy of Colin M.L. Burnett) The slave select pin will control when a device can be accessed if more than one slave is attached to the master (see Figure 11-4). When there is only one slave device, as in your case, the SS (called CSB on the SCP1000) is optional. However, as a rule, it should be used regardless as it is also used as a reset for the slave to make it ready to receive the next byte. The slave select signal is sent out by the master to tell the slave that it wishes to start an SPI data exchange. This signal is active when LOW, so when held HIGH the slave device is not selected. Data is only output during either the rising or falling edge of the clock signal on SCK. Data is latched during the opposite edge of SCK. The polarity of the clock is set by the master using one of the flags set in the SPCR register. The two data lines are known as MOSI (Master Output Slave Input) and MISO (Master

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There are six phases in all (the solid boxes in Figure 20-3), and each phase and the events associated with it are completely processed before the subsequent phase is started.

The Rise of Governance The reason was, in essence, tunnel vision. Leaders of some of the world s marquee corporations were blindsided because their internal corporate monitors were unable to piece together regulatory, operational, and riskmanagement indicators that pointed to irregularities and which collectively jeopardized the underpinnings of their businesses. The subprime-mortgage crisis was the latest event to highlight shortcomings in corporate governance. Many past failures, including that of Enron, were often the result of poor corporate oversight. In some cases, out-and-out fraud was involved. However, fraud that goes undetected or unaddressed is, to some extent, a failure of corporate governance. As these cases appear in the news, cries for stronger and more effective governance, often accompanied by more stringent governmental regulation, go out. In many cases, these governance holes are plugged or at least mitigated until the next governance crisis. This creates a need for increased emphasis on improved governance, and the cycle continues.

Input Slave Output). So, if the device is set to send data from the master on the rising edge of the clock pulse, data would be sent back from the slave on the falling edge of the clock pulse. Data is therefore both sent (MOSI) and input (MISO) from the master during one clock pulse.

Note Events and event listeners are the mechanism by which JSF exposes its internals to third-party

Figure 11-4. Left: A master with three independent slaves. Right: daisy chained slaves. (Images courtesy of Colin M.L. Burnett) Remember that even if you only want to read data from a device (like you do with the SCP1000), you still need to send data both ways during one exchange. The three registers used by the SPI bus are: SPCR SPI Control Register SPDR SPI Data Register SPSR SPI Status Register

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